1. Field of the Invention
The present invention relates to a semiconductor device, particularly to a semiconductor device including a nonvolatile memory which uses a memory cell for storing information using a magnetic resistance or phase change resistance and which is low in power and high in speed and is highly integrated.
2. Description of the Related Art
A magnetoresistive random access memory (MRAM) has been developed which is a nonvolatile memory but which has no limitation in the number of read/write operations. The MRAM stores information using a magnetoresistive effect in which a resistance of an element differs with a magnetization direction of a ferromagnetic material in a memory cell. In recent years, development of a magnetic tunnel junction (MTJ) element whose magnetoresistive change ratio referred to as magnetoresistance (MR) is larger than that of a related-art element, and application of the element to the MRAM have been advanced. It has been indicated that a high-speed read/write operation is possible as in a static random access memory (SRAM) and that high integration can be realized as in a dynamic random access memory (DRAM). This is described, for example, in Document 1: 2002 Symposium on VLSI Circuits Digest of Technical Papers, pp. 158–161.
FIG. 11 shows a basic constitution of the memory cell of the MRAM. The cell is constituted of one MTJ element MTJ and one transistor MT, and is connected to a write word line WW, read word line WR, and data line DL. The MTJ element MTJ includes a structure of a tunnel insulating film held between a fixed layer of a ferromagnetic material whose magnetization direction is fixed in a usual operation, and a free layer of the ferromagnetic material whose magnetization direction can be reversed by a write operation. A resistance between two terminals of the MTJ element changes by the direction of magnetization in two ferromagnetic material layers. When the directions are the same, a low resistance state is obtained. When the directions are opposite to each other, a high resistance state is obtained.
A read operation is performed as shown in FIG. 12. That is, the operation comprises: selecting the read word line WR; achieving electric continuity of a transistor MMC; applying a voltage between the terminals of the MTJ element MTJ; detecting a current IDL flowing in accordance with the magnetoresistance of the MTJ element MTJ via the data line DL; and reading out stored information. On the other hand, a write operation is performed as shown in FIG. 13. That is, the operation comprises: setting a current IWW of the selected write word line WW to a write word line current IWS; and passing a write current ID1 or ID0 through the data line DL in accordance with writing data. At this time, a magnetoresistive change MR which is a ratio of a resistance increase of the high resistance state to the low resistance state of the MTJ element indicates a hysteresis characteristic shown in FIG. 14. The magnetization reverse of the MTJ element easily occurs by a hard axis magnetic field generated in the write word line current IWS, and the hysteresis characteristic becomes narrow with respect to the data line current IDL which causes an easy axis magnetic field. Thereby, only the selected memory cell is reversed in magnetization by the write word line WW and the stored information can be written. It is to be noted that in FIGS. 12 to 14, the low resistance state of the MTJ element is represented by ‘1’, and the high resistance state is represented by ‘0’, but this representation may be reverse.
In the same manner as in the MRAM, a phase change memory has also been developed to aim at the nonvolatile memory which has high-speed and is highly integrated. This is described, for example, in Document 2:2002 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 202–203. The phase change memory uses a resistance which differs by a state of a phase change material to store the information. A phase change resistance is rewritten by passing the current to generate heat.
The present inventors have studied a current consumption in the write operation with the highly integrated MRAM prior to the present application. At present, the write word line current IWS and write current ID1 or ID0 shown in FIG. 13 require a magnitude of about 2 mA to 8 mA in order to generate a sufficiently large magnetic field. In Document 1, a technique referred to as cladding has been proposed for concentrating the magnetic field generated by the word and data lines on an MTJ element side, but a current of about 4 mA is used. Additionally, when the number of bits to be written at the same time increases, the write current is passed through the same number of data lines as that of bits. The present inventors have found that a total write current increases. Moreover, the present inventors have found that with a reduced area of the ferromagnetic material, the magnetic field necessary for the magnetization reverse is generally enlarged, and a further large current is required.
Furthermore, the phase change memory also has a large current required for the writing, because a sufficient temperature rise is caused in the phase change resistance. Additionally, the same current path is used for the reading/writing, and the read current has to be set to be different from the write current at a desired ratio in order to prevent disturbance by the reading. Therefore, the present inventors have found that to enlarge the read current for a high-speed read operation, the write current also has to be enlarged.